consist of a reference oscillator, 12
–bit programmable reference divider, digital phase detector, 14
–bit programmable divide
&nbs.
such as the ML12061 MECL device. The reference signal from the MECL device is ac coupled to OSCin. For large amplitude .
INPUT PINS D0
– D3 Data Inputs (PDIP
– Pins 2, 1, 18, 17; SOG
– Pins 2, 1, 20, 19) Information at these inputs is transferred to the internal latches when the ST input is in the high state. D3 is most .
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